One-Time Programmable memory (OTP-Memory) refers to a read-only memory (ROM), which can be programmed one time after manufacture of a device (also called one-time programmable ROM or OTP-ROM). To-date there are examples of OTP-ROMs which have been realized using many technologies as the memory element. For example data can be stored by destructing diodes or oxide-films to form a low impedance path where previously there was a high impedance path. Also data can be stored in a floating gate transistor such that the floating gate retains charge and alters the transistors threshold voltage which is the basis for EPROM. Integrated fuses have also been used to realize OTP-ROM. By passing adequate current through a fuse it can be blown to create a high-impedance path where previously there was a low impedance path. These technologies have disadvantages that include relatively high currents to program, and relatively high voltages to program, i.e. above breakdown voltages for present day sub-micron CMOS technology. They also can be destructive to surrounding layers on an integrated circuit and require relatively large area and thus result in lower density memory. For example, U.S. Pat. No. 5,208,780, entitled “Structure of Electrically Programmable Read-Only Memory Cells and Redundancy Signature Therefor” discloses an OTP-ROM, which uses fuses as the memory element. However it requires high voltage (10V) to program the fuse and passes current through the fuse using an NMOS that goes into “snap-back” or secondary breakdown to provide the high current required to blow the fuse. This snap-back current will be relatively large and the NMOS device will have to be sized to avoid damage during snap-back. This results in a larger pass transistor than required in the present invention and which is thus less area-efficient. U.S. Pat. No. 3,641,516, entitled “Write Once Read Only Store Semiconductor Memory” discloses an OTP-ROM realized with back-to-back diodes as the memory element. To program this memory current or voltage is applied to the memory cell to cause one of the diodes to breakdown and results in a metal-silicon alloy short across its p-n junction. The voltage required to breakdown the p-n junction is typically 8V which is beyond that allowed for modern sub-micron MOS processes. U.S. Pat. No. 4,422,092, entitled “High Coupling Ratio Electrically Programmable ROM” is based on floating gate EPROM. The disadvantage of this approach is a high voltage required to program the device. In this example 15V is required on the drain and 25V on the gate for programming. This is well beyond the maximum voltage allowed for standard sub-micron CMOS processes and results in relatively specialized processes, which are more expensive.